MAR Progress, day 2
Goooooood morning! Who woke up early on a Sunday, so they decided to spend their morning starting off with wiring for a chip that doesn’t exist here yet. Ha, wouldn’t be me, right?
The amount of time that I’ve spent trying to figure out this control logic, realizing flaws that I’ve made today is stupid. I think I’ve spent at least an hour or two trying to do it in the fewest amount of chips, and on the rising edge…yeah.
I’ve commented out the connection listing from grok. That’s probably going to get me, but thankfully most of that logic is on top of the data/address wires, so it won’t be like undoing the whole thing. Testing&debugging it will still be fun, but it will mostly involve reading&writing at several key addresses.